The geeks are hard at work in the lab at the University of Rochester. A
pair of new technologies may soon enable power-hungry imaging chips to
use just a fraction of the energy needed today and capture better
images as well-all while someday enabling cameras to shrink to the size
of a shirt button and run for years on a single battery.
The team of Mark Bocko, professor of electrical and computer
engineering, and Zeljko Ignjatovic, assistant professor of electrical
and computer engineering, has designed a prototype chip that can
digitize an image at each pixel on a sensor. Now they are working to
incorporate a second technology that will compress the image with far
fewer computations than the best current compression techniques.
The first technology integrates an oversampling "sigma-delta"
analog-to-digital converter at each pixel location in a CMOS sensor.
Previous attempts to do this on"pixel conversion have required far too
many transistors, leaving too little area to collect light. The new
designs use as few as three transistors per pixel, reserving nearly
half of the pixel area for light collection.
The second advance-called "Focal Plane Image Compression"- arranges
photodiodes on a chip so that compressing the resulting image demands
as little as one percent of the computing power usually needed.
Normally, the light"detecting diodes on a chip are arranged in a
regular grid-say 1,000 pixels by 1,000 pixels. When the image hits the
diodes, a computer must process each and then compress the entire
image. This compression technique takes a tremendous amount of computer
processing and, hence, battery power.
Ignjatovic and Bocko came up with a way to make the physical layout of
the light"sensitive diodes simplify the computation, reducing the
needed computing power five-fold. Stay tuned.